adrl pseudo op
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@ -25,12 +25,11 @@ syn region armComment start="/\*" end="\*/" contains=armTodo
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syn region armString start="\"" skip=+\\"+ end="\"\|$"
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syn region armString start="\"" skip=+\\"+ end="\"\|$"
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syn region armString start="'" skip=+\\'+ end="'\|$"
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syn region armString start="'" skip=+\\'+ end="'\|$"
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" local labels
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syn match armCPreProc "^\s*#\s*\(include\|define\|undef\|if\|ifdef\|ifndef\|elif\|else\|endif\|error\|pragma\)\>"
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so <sfile>:p:h/gas_directives.vim
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so <sfile>:p:h/gas_directives.vim
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so <sfile>:p:h/arm_directives.vim
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so <sfile>:p:h/arm_directives.vim
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syn match armCPreProc "^\s*#\s*\(include\|define\|undef\|if\|ifdef\|ifndef\|elif\|else\|endif\|error\|pragma\)\>"
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" Registers
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" Registers
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syn match armRegister "R\%(1[0-5]\|[0-9]\)"
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syn match armRegister "R\%(1[0-5]\|[0-9]\)"
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syn match armRegister "C\%(1[0-5]\|[0-9]\)"
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syn match armRegister "C\%(1[0-5]\|[0-9]\)"
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@ -47,7 +46,9 @@ let armCond = '\%(AL\|CC\|CS\|EQ\|GE\|GT\|HI\|HS\|LE\|LO\|LS\|LT\|MI\|NE\|PL\|VC
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"
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"
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exec 'syn match armv4Instr "\%(ADC\|ADD\|AND\|ASR\|BIC\|EOR\|LSL\|LSR\|MLA\|MOV\|MUL\|MVN\|NEG\|ORR\|ROR\|RRX\|RSB\|RSC\|SBC\|SMLAL\|SMULL\|SUB\|UMLAL\|UMULL\)' . armCond . 'S\?\>"'
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exec 'syn match armv4Instr "\%(ADC\|ADD\|AND\|ASR\|BIC\|EOR\|LSL\|LSR\|MLA\|MOV\|MUL\|MVN\|NEG\|ORR\|ROR\|RRX\|RSB\|RSC\|SBC\|SMLAL\|SMULL\|SUB\|UMLAL\|UMULL\)' . armCond . 'S\?\>"'
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exec 'syn match armv4InstrCond "\%(ADR\|B\|BL\|BX\|CDP\|CMN\|CMP\|LDC\|MCR\|MRC\|MRS\|MSR\|NOP\|POP\|PUSH\|STC\|SWI\|TEQ\|TST\)' . armCond . '\>"'
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exec 'syn match armv4InstrCond "\%(B\|BL\|BX\|CDP\|CMN\|CMP\|LDC\|MCR\|MRC\|MRS\|MSR\|NOP\|POP\|PUSH\|STC\|SWI\|TEQ\|TST\)' . armCond . '\>"'
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exec 'syn match armv4InstrCond "ADR' . armCond . 'L\?\>"'
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exec 'syn match armv4LDR "\%(LDR\)' . armCond . '\%(B\?T\?\|H\|S[BH]\)\?\>"'
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exec 'syn match armv4LDR "\%(LDR\)' . armCond . '\%(B\?T\?\|H\|S[BH]\)\?\>"'
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exec 'syn match armv4STR "\%(STR\)' . armCond . '\%(B\?T\?\|H\)\?\>"'
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exec 'syn match armv4STR "\%(STR\)' . armCond . '\%(B\?T\?\|H\)\?\>"'
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