fix local labels, binary, register groups

This commit is contained in:
ARM9 2015-07-15 18:22:40 +02:00
parent 3d23f83716
commit 6445d61998
7 changed files with 56 additions and 37 deletions

View File

@ -44,20 +44,23 @@ if version >= 508 || !exists("did_arm_syntax_inits")
HiLink armRelative armOperator
" Link to standard syn groups so the 'colorschemes' work
HiLink armOperator Operator
HiLink armNumber Number
HiLink armComment Comment
HiLink armOperator Operator
HiLink armNumber Constant
HiLink armString String
HiLink armIdentifier Label
HiLink armLabel Label
HiLink gasDirective PreProc
HiLink armDirective PreProc
HiLink armIdentifier Function
HiLink armLabel Function
HiLink gasDirective Preproc
HiLink armDirective Preproc
HiLink armCPreProc Identifier
HiLink armRegister Type
HiLink armv6Register Type
HiLink armv6Instructions Function
HiLink armv6Instructions Keyword
HiLink armTodo Todo
delcommand HiLink

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@ -32,19 +32,22 @@ if version >= 508 || !exists("did_armv4_syntax_inits")
HiLink armRelative armOperator
" Link to standard syn groups so the 'colorschemes' work
HiLink armOperator Operator
HiLink armNumber Number
HiLink armComment Comment
HiLink armOperator Operator
HiLink armNumber Constant
HiLink armString String
HiLink armIdentifier Label
HiLink armLabel Label
HiLink gasDirective PreProc
HiLink armDirective PreProc
HiLink armIdentifier Function
HiLink armLabel Function
HiLink gasDirective Preproc
HiLink armDirective Preproc
HiLink armCPreProc Identifier
HiLink armRegister Type
HiLink armv4Instructions Function
HiLink armv4Instructions Keyword
HiLink armTodo Todo
delcommand HiLink

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@ -33,19 +33,22 @@ if version >= 508 || !exists("did_armv5_syntax_inits")
HiLink armRelative armOperator
" Link to standard syn groups so the 'colorschemes' work
HiLink armOperator Operator
HiLink armNumber Number
HiLink armComment Comment
HiLink armOperator Operator
HiLink armNumber Constant
HiLink armString String
HiLink armIdentifier Label
HiLink armLabel Label
HiLink gasDirective PreProc
HiLink armDirective PreProc
HiLink armIdentifier Function
HiLink armLabel Function
HiLink gasDirective Preproc
HiLink armDirective Preproc
HiLink armCPreProc Identifier
HiLink armRegister Type
HiLink armv5Instructions Function
HiLink armv5Instructions Keyword
HiLink armTodo Todo
delcommand HiLink

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@ -5,12 +5,10 @@ syn match armNumericOp "[+-/*%<>=&|^!]"
" hex
syn match armNumber "[#\$]\?0x\x\+\>"
syn match armNumber "[#\$]\?\d\x*h\>"
" dec
syn match armNumber "[#\$]\?\d\+\>"
" bin
syn match armNumber "[#\$]\?0b[01]\+\>"
syn match armNumber "[#\$]\?[01]\+b\>"
" floats
syn match armNumber "\d*\.\d\+\>"
@ -26,16 +24,17 @@ syn region armString start="'" skip=+\\'+ end="'\|$"
" Assembler identifiers/labels/directives
syn match armIdentifier "\<\h\w*\>"
syn match armLabel "\<\h\w*:"
syn match armLabel "\<\d\{1,3\}[:fb]"
syn match armCPreProc "^\s*#\(include\|define\|undef\|if\|ifdef\|ifndef\|elif\|else\|endif\|error\|pragma\)\>"
syn match armLabel "\<\d\{1,3\}[:fb]\>"
syn match armCPreProc "^\s*#\s*\(include\|define\|undef\|if\|ifdef\|ifndef\|elif\|else\|endif\|error\|pragma\)\>"
so <sfile>:p:h/gas_directives.vim
so <sfile>:p:h/arm_directives.vim
" Registers
syn keyword armRegister R0 R1 R2 R3 R4 R5 R6 R7 R8
syn keyword armRegister R9 R10 R11 R12 R13 R14 R15 FP SP LR PC SPSR CPSR CPSR_c CPSR_cxsf BP
syn keyword armRegister A1 A2 A3 A4 V1 V2 V3 V4 V5 V6 V7 V8
syn match armRegister "R\%(1[0-5]\|[0-9]\)"
syn keyword armRegister FP SP LR PC SPSR CPSR CPSR_c CPSR_cxsf BP
syn match armRegister "A[1-3]"
syn match armRegister "V[1-8]"
" Conditional field to avoid repetition
let armCond = '\%(AL\|CC\|CS\|EQ\|GE\|GT\|HI\|HS\|LE\|LO\|LS\|LT\|MI\|NE\|PL\|VC\|VS\)\?'

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@ -2,14 +2,8 @@
so <sfile>:p:h/armv5_base_syntax.vim
" VFP/NEON registers
let i = 0
while i < 32
exe 'syn match armv6Register "S' . i . '\>"'
exe 'syn match armv6Register "D' . i . '\>"'
let i = i + 1
endwhile
syn keyword armv6Register Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 Q15
syn match armv6Register "[SD]\%(3[01]\|[12]\?[0-9]\)"
syn match armv6Register "Q\%(1[0-5]\|[0-9]\)"
"
" ARMv6 instructions

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@ -8,6 +8,7 @@
adc r1, r15, R14
add A1, v1, V8
sub r5, #0xFeeDB4c
smull r0, r1,R2
smull r0, r1,R2
@ -16,5 +17,6 @@ blx 0002f
smlalBt r1,r15
SMLawTb V8, v3
SMLALtb A1, a4
1.0f 0.f .1f
@ vim:ft=armv4

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@ -1,10 +1,17 @@
adc r0, r1
add R1, R2
0:
sub r14, 0b1110110
1:
and R2,r3
bic r3 , r4
eor r4,r5
mla r5,R6
mov R6,R7
b 001b
push {r0, r1, r2-r9}
pop {r1-r14}
FSHTOS
@ -15,8 +22,16 @@ fcmpezs
fcmpzs
fdivs
vmul Q15, Q16, d31, s31, s32, d32
vdiv
vsqrt
.float 3.14159
@ illegal
blx 0002f
1.0f 0.f .1f
vmul Q15, Q16, d31, s31, s32, d32
vmull q01, q09, q14, q16
push {q0-q14}
pop {s3-s32}
@ vim:ft=arm