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Highlight instructions with {cond} at the very end

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When trying to use e.g. ADR{cond}L in the unified syntax, the GNU
assembler warns that the conditional infixes are deprecated. The
preferred form is ADRL{cond} instead. It is also in line with arm.com
and keil.com documentation.

This applies to other instructions that have optional parts (e.g. "S"
for updating condition flags) - the condition goes last.
This commit is contained in:
Sławomir Bocheński 2021-03-26 02:24:56 +01:00
parent caf53551a0
commit 4b4bc41933
2 changed files with 8 additions and 0 deletions
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6
syntax/include/arm_base_syntax.vim
View File

@ -48,15 +48,21 @@ let armCond = '\%(AL\|CC\|CS\|EQ\|GE\|GT\|HI\|HS\|LE\|LO\|LS\|LT\|MI\|NE\|PL\|VC
" ARMv4 and thumb instructions " ARMv4 and thumb instructions
" "
exec 'syn match armv4Instr "\%(ADC\|ADD\|AND\|ASR\|BIC\|EOR\|LSL\|LSR\|MLA\|MOV\|MUL\|MVN\|NEG\|ORR\|ROR\|RRX\|RSB\|RSC\|SBC\|SMLAL\|SMULL\|SUB\|UMLAL\|UMULL\)' . armCond . 'S\?\>"' exec 'syn match armv4Instr "\%(ADC\|ADD\|AND\|ASR\|BIC\|EOR\|LSL\|LSR\|MLA\|MOV\|MUL\|MVN\|NEG\|ORR\|ROR\|RRX\|RSB\|RSC\|SBC\|SMLAL\|SMULL\|SUB\|UMLAL\|UMULL\)' . armCond . 'S\?\>"'
exec 'syn match armv4Instr "\%(ADC\|ADD\|AND\|ASR\|BIC\|EOR\|LSL\|LSR\|MLA\|MOV\|MUL\|MVN\|NEG\|ORR\|ROR\|RRX\|RSB\|RSC\|SBC\|SMLAL\|SMULL\|SUB\|UMLAL\|UMULL\)S' . armCond . '\>"'
exec 'syn match armv4InstrCond "\%(B\|BL\|BX\|CDP\|CMN\|CMP\|LDC\|MCR\|MRC\|MRS\|MSR\|NOP\|POP\|PUSH\|STC\|SWI\|TEQ\|TST\)' . armCond . '\>"' exec 'syn match armv4InstrCond "\%(B\|BL\|BX\|CDP\|CMN\|CMP\|LDC\|MCR\|MRC\|MRS\|MSR\|NOP\|POP\|PUSH\|STC\|SWI\|TEQ\|TST\)' . armCond . '\>"'
exec 'syn match armv4InstrCond "ADR' . armCond . 'L\?\>"' exec 'syn match armv4InstrCond "ADR' . armCond . 'L\?\>"'
exec 'syn match armv4InstrCond "ADRL' . armCond . '\>"'
exec 'syn match armv4LDR "\%(LDR\)' . armCond . '\%(B\?T\?\|H\|S[BH]\)\?\>"' exec 'syn match armv4LDR "\%(LDR\)' . armCond . '\%(B\?T\?\|H\|S[BH]\)\?\>"'
exec 'syn match armv4LDR "LDR\%(B\?T\?\|H\|S[BH]\)' . armCond . '\>"'
exec 'syn match armv4STR "\%(STR\)' . armCond . '\%(B\?T\?\|H\)\?\>"' exec 'syn match armv4STR "\%(STR\)' . armCond . '\%(B\?T\?\|H\)\?\>"'
exec 'syn match armv4STR "STR\%(B\?T\?\|H\)' . armCond . '\>"'
exec 'syn match armv4Stack "\%(LDM\|STM\)' . armCond . '\%([ID][BA]\|[EF][DA]\)\>"' exec 'syn match armv4Stack "\%(LDM\|STM\)' . armCond . '\%([ID][BA]\|[EF][DA]\)\>"'
exec 'syn match armv4Stack "\%(LDM\|STM\)\%([ID][BA]\|[EF][DA]\)' . armCond . '\>"'
exec 'syn match armv4SWP "SWP' . armCond . 'B\?\>"' exec 'syn match armv4SWP "SWP' . armCond . 'B\?\>"'
exec 'syn match armv4SWP "SWPB' . armCond . '\>"'
"syn match armRelative "@R[0-7]\|@a\s*+\s*dptr\|@[ab]" "syn match armRelative "@R[0-7]\|@a\s*+\s*dptr\|@[ab]"

2
syntax/include/armv5_base_syntax.vim
View File

@ -14,7 +14,9 @@ HiLink armv4InstrNoCond armv5InstrNoCond
exec 'syn match armv5Mul "\%(SMLA\|SMLAL\|SMLAW\|SMUL\|SMULW\)[BT][BT]\?' . armCond . '\>"' exec 'syn match armv5Mul "\%(SMLA\|SMLAL\|SMLAW\|SMUL\|SMULW\)[BT][BT]\?' . armCond . '\>"'
exec 'syn match armv5LDR "\%(LDR\)' . armCond . 'D\>"' exec 'syn match armv5LDR "\%(LDR\)' . armCond . 'D\>"'
exec 'syn match armv5LDR "LDRD' . armCond . '\>"'
exec 'syn match armv5STR "\%(STR\)' . armCond . 'D\>"' exec 'syn match armv5STR "\%(STR\)' . armCond . 'D\>"'
exec 'syn match armv5STR "STRD' . armCond . '\>"'
HiLink armv4LDR armv5LDR HiLink armv4LDR armv5LDR
HiLink armv4STR armv5STR HiLink armv4STR armv5STR