diff --git a/syntax/include/arm_base_syntax.vim b/syntax/include/arm_base_syntax.vim
index 5d820a6..8e322a5 100644
--- a/syntax/include/arm_base_syntax.vim
+++ b/syntax/include/arm_base_syntax.vim
@@ -45,11 +45,9 @@ let armCond = '\%(AL\|CC\|CS\|EQ\|GE\|GT\|HI\|HS\|LE\|LO\|LS\|LT\|MI\|NE\|PL\|VC
 "
 " ARMv4 and thumb instructions
 " 
-exec 'syn match armv4Instr "\%(ADC\|ADD\|AND\|BIC\|EOR\|MLA\|MOV\|MUL\|MVN\|NEG\|ORR\|RSB\|RSC\|SBC\|SMLAL\|SMULL\|SUB\|UMLAL\|UMULL\)' . armCond . 'S\?\>"'
+exec 'syn match armv4Instr "\%(ADC\|ADD\|AND\|ASR\|BIC\|EOR\|LSL\|LSR\|MLA\|MOV\|MUL\|MVN\|NEG\|ORR\|ROR\|RRX\|RSB\|RSC\|SBC\|SMLAL\|SMULL\|SUB\|UMLAL\|UMULL\)' . armCond . 'S\?\>"'
 
-exec 'syn match armv4InstrCond  "\%(B\|BL\|BX\|CDP\|CMN\|CMP\|LDC\|MCR\|MRC\|MRS\|MSR\|STC\|SWI\|TEQ\|TST\)' . armCond . '\>"'
-
-syn match armv4InstrNoCond  "\%(ASR\|LSL\|LSR\|NOP\|POP\|PUSH\|ROR\|RRX\)\>"
+exec 'syn match armv4InstrCond  "\%(ADR\|B\|BL\|BX\|CDP\|CMN\|CMP\|LDC\|MCR\|MRC\|MRS\|MSR\|NOP\|POP\|PUSH\|STC\|SWI\|TEQ\|TST\)' . armCond . '\>"'
 
 exec 'syn match armv4LDR    "\%(LDR\)' . armCond . '\%(B\?T\?\|H\|S[BH]\)\?\>"'
 exec 'syn match armv4STR    "\%(STR\)' . armCond . '\%(B\?T\?\|H\)\?\>"'
diff --git a/test/armv4-test.s b/test/armv4-test.s
index 24bdaae..00ef7bd 100644
--- a/test/armv4-test.s
+++ b/test/armv4-test.s
@@ -8,11 +8,13 @@
 
 adc r1, r15, R14
 add A1, v1, V8
+adrcc r8, 0b
 sub r5, #0xFeeDB4c
 smull r0, r1,R2
 smull r0, r1,R2
 
 @ illegal
+adrgts
 blx 0002f
 smlalBt r1,r15
 SMLawTb V8, v3