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ADR ADRL pseudo-ops

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ARM9
2015-05-24 20:57:03 +02:00
parent 97c5907e8d
commit 2935a2b0d6
1 changed files with 2 additions and 2 deletions
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4
syntax/include/arm_base_syntax.vim
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@ -42,11 +42,11 @@ let armCond = '\%(AL\|CC\|CS\|EQ\|GE\|GT\|HI\|HS\|LE\|LO\|LS\|LT\|MI\|NE\|PL\|VC
"
" ARMv4 and thumb instructions
"
exec 'syn match armv4Instr "\%(ADC\|ADD\|AND\|BIC\|EOR\|MLA\|MOV\|MUL\|MVN\|NEG\|ORR\|RSB\|RSC\|SBC\|SMLAL\|SMULL\|SUB\|UMLAL\|UMULL\)' . armCond . 'S\?\>"'
exec 'syn match armv4Instr "\%(ADC\|ADD\|ADR\|AND\|BIC\|EOR\|MLA\|MOV\|MUL\|MVN\|NEG\|ORR\|RSB\|RSC\|SBC\|SMLAL\|SMULL\|SUB\|UMLAL\|UMULL\)' . armCond . 'S\?\>"'
exec 'syn match armv4InstrCond "\%(B\|BL\|BX\|CDP\|CMN\|CMP\|LDC\|MCR\|MRC\|MRS\|MSR\|STC\|SWI\|TEQ\|TST\)' . armCond . '\>"'
syn match armv4InstrNoCond "\%(ASR\|LSL\|LSR\|NOP\|POP\|PUSH\|ROR\|RRX\)\>"
syn match armv4InstrNoCond "\%(ADRL\|ASR\|LSL\|LSR\|NOP\|POP\|PUSH\|ROR\|RRX\)\>"
exec 'syn match armv4LDR "\%(LDR\)' . armCond . '\%(B\?T\?\|H\|S[BH]\)\?\>"'
exec 'syn match armv4STR "\%(STR\)' . armCond . '\%(B\?T\?\|H\)\?\>"'